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config.sub: Handle MIPS R3 and R5 ISA levels with CPU names

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Complement binutils commit ae52f4830604 ("Add MIPS r3 and r5 support.")
and recognize MIPS CPU patterns for the R3 and R5 ISA levels, used by
GAS to set defaults.

* config.sub (mipsisa32r3, mipsisa32r3el, mipsisa32r5, mipsisa32r5el,
mipsisa64r3, mipsisa64r3el, mipsisa64r5, mipsisa64r5el): Recognize.
* doc/config.sub.1: Regenerate.
* testsuite/config-sub.data: Add test cases.

Signed-off-by: Dmitry V. Levin <ldv@altlinux.org>
This commit is contained in:
Maciej W. Rozycki 2021-05-01 01:15:08 +02:00 committed by Dmitry V. Levin
parent 491e04557e
commit 7779518ae2
3 changed files with 14 additions and 2 deletions
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6
config.sub vendored
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@ -2,7 +2,7 @@
# Configuration validation subroutine script.
# Copyright 1992-2021 Free Software Foundation, Inc.
timestamp='2021-04-21'
timestamp='2021-04-30'
# This file is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by
@ -1204,9 +1204,13 @@ case $cpu-$vendor in
| mips64vr5900 | mips64vr5900el \
| mipsisa32 | mipsisa32el \
| mipsisa32r2 | mipsisa32r2el \
| mipsisa32r3 | mipsisa32r3el \
| mipsisa32r5 | mipsisa32r5el \
| mipsisa32r6 | mipsisa32r6el \
| mipsisa64 | mipsisa64el \
| mipsisa64r2 | mipsisa64r2el \
| mipsisa64r3 | mipsisa64r3el \
| mipsisa64r5 | mipsisa64r5el \
| mipsisa64r6 | mipsisa64r6el \
| mipsisa64sb1 | mipsisa64sb1el \
| mipsisa64sr71k | mipsisa64sr71kel \

2
doc/config.sub.1
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@ -1,5 +1,5 @@
.\" DO NOT MODIFY THIS FILE! It was generated by help2man 1.47.16.
.TH CONFIG.SUB "1" "April 2021" "GNU config.sub (2021-04-21)" "User Commands"
.TH CONFIG.SUB "1" "April 2021" "GNU config.sub (2021-04-30)" "User Commands"
.SH NAME
config.sub \- validate and canonicalize a configuration triplet
.SH SYNOPSIS

8
testsuite/config-sub.data
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@ -419,6 +419,10 @@ mipsisa32 mipsisa32-unknown-elf
mipsisa32el mipsisa32el-unknown-elf
mipsisa32r2 mipsisa32r2-unknown-elf
mipsisa32r2el mipsisa32r2el-unknown-elf
mipsisa32r3 mipsisa32r3-unknown-elf
mipsisa32r3el mipsisa32r3el-unknown-elf
mipsisa32r5 mipsisa32r5-unknown-elf
mipsisa32r5el mipsisa32r5el-unknown-elf
mipsisa32r6 mipsisa32r6-unknown-elf
mipsisa32r6-elf mipsisa32r6-unknown-elf
mipsisa32r6el mipsisa32r6el-unknown-elf
@ -427,6 +431,10 @@ mipsisa64 mipsisa64-unknown-elf
mipsisa64el mipsisa64el-unknown-elf
mipsisa64r2 mipsisa64r2-unknown-elf
mipsisa64r2el mipsisa64r2el-unknown-elf
mipsisa64r3 mipsisa64r3-unknown-elf
mipsisa64r3el mipsisa64r3el-unknown-elf
mipsisa64r5 mipsisa64r5-unknown-elf
mipsisa64r5el mipsisa64r5el-unknown-elf
mipsisa64r6 mipsisa64r6-unknown-elf
mipsisa64r6-elf mipsisa64r6-unknown-elf
mipsisa64r6el mipsisa64r6el-unknown-elf